NEC PD78214 User Manual
Page 77
48
µ
PD78214 Sub-Series
Fig. 3-11 Configuration of General-Purpose Registers
A
E1H
B
E3H
D
E5H
H
E7H
A
E9H
B
EBH
D
EDH
H
EFH
A
F1H
B
F3H
D
F5H
H
F7H
A
F9H
B
FBH
D
FDH
H
FFH
X
E0H
C
E2H
E
E4H
L
E6H
X
E8H
C
EAH
E
ECH
L
EEH
X
F0H
C
F2H
E
F4H
L
F6H
X
F8H
C
FAH
E
FCH
L
FEH
AX
BC
DE
HL
AX
BC
DE
HL
AX
BC
DE
HL
AX
BC
DE
HL
E0H
E2H
E4H
E6H
E8H
EAH
ECH
EEH
F0H
F2H
F4H
F6H
F8H
FAH
FCH
FEH
Register bank 3
(RBS1, 0 = 11)
Register bank 2
(RBS1, 0 = 10)
Register bank 1
(RBS1, 0 = 01)
Register bank 0
(RBS1, 0 = 00)
↑
↓
↑
↓
↑
↓
↑
↓
0FEE0H
0FEFFH
(8-bit processing)
(16-bit processing)
To specify the register bank to be used to execute an instruction, use the CPU control instruction (SEL RBn).
When RESET is input, register bank 0 is specified.
The current register bank can be checked by reading the register bank selection flags (RBS0, RBS1) in the PSW.
The area from 0FEE0H to 0FEFFH can be addressed and accessed as an ordinary data memory area,
irrespective of whether the area is used for general-purpose registers.
Remark To restore the current register bank after it is changed to a different register bank, execute the PUSH PSW instruction to save the PSW
to a stack, then execute the SEL RBn instruction. The POP PSW instruction can restore the register bank if the stack position is not
changed. If an interrupt handling program changes the register bank, the PSW is automatically saved to a stack when an interrupt
is acknowledged. The PSW is restored by the RETI or RETB instruction. If a single register bank is predetermined for the interrupt
handling routine, only the SEL RBn instruction need be executed. The PUSH PSW instruction need not be executed.
Examples 1. Changing the register bank by an ordinary program
Specifying register bank 2
PUSH
PSW
SEL
RB2
POP
PSW
The previous register bank is used.
2. Changing the register bank by an interrupt handling program
Selecting register bank 1
SEL
RB1
RETI
··
··
·
··
··
·
··
··
·
Register bank 2 is used.
Register bank 1 is used.
The previous register bank is automatically
restored upon return from the interrupt
handling program.
··
··
·