NEC PD78214 - Manual (Page 244)

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Chapter 7 Timer/Counter Units
7
(6) When a register associated with a timer/counter is accessed, wait states as many as the maximum number
of clock pulses Note indicated below are automatically inserted.
Note One wait state: 1/f
CLK
Table 7-20 Maximum Number of Wait States Inserted When Registers Associated
with Timers/Counters Are Accessed
TMCn
PRMn
CRCn
TOC
CRnm
TM0
TM1
TM2
TM3
Register
0
—
—
—
1
7
15
15
7
For read
1
1
1
1
1
—
—
—
—
For write
Number of wait states inserted
(7) While an instruction for writing to compare register CRnm (n = 0 to 3, m = 0, 1) is being executed, no
coincidence is detected between the CRnm register being written to and TMn (n = 0 to 3). For example, if the
value of the CRnm register remains unchanged after the CRnm is written to, no interrupt request is generated,
and timer output (TOn: n = 0 to 3) does not change even when the value of TMn coincides with the value of
the CRnm register.
While a timer/counter is performing count operation, CRnm register write operation must be performed when
the value of TMn does not coincide with the value of the CRnm register before or after CRnm register write
operation. (CRnm register write operation must be performed, for example, immediately after an interrupt
request is generated by a coincidence between TMn and CRnm.)
(8) A coincidence between TMn and CRnm is detected only when TMn is incremented. This means that no
interrupt request is generated, and no timer output change is made even if the same value as of TMn is written
to CRnm.