NEC PD78214 - Manual (Page 418)

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15
CHAPTER 15 RESET FUNCTION
15.1 RESET FUNCTION
When the signal applied to the RESET input pin is low, the system is reset, and each hardware component is set
to the state indicated in Table 15-2. All pins, except the power supply pin, assume the high-impedance state. Table
15-1 lists the states of pins during reset and after the reset state is released.
When the signal applied to the RESET input pin goes high, the reset state is released and program execution
branches as follows: The contents of address 00000H in the reset vector table are set in bits 0 to 7 of the program
counter (PC), while the contents of 00001H are set in bits 8 to 15 of the PC. The program is resumed from the address
set in the PC. You can thus resume the program from an arbitrary address.
Initialize registers in the program as required.
The RESET pin contains a noise eliminator based on analog delays to prevent abnormal operation due to noise
(see Fig. 15-1).
Fig. 15-1 Acceptance of the RESET Signal
Remark f
CLK
: System clock frequency (f
XX
/2)
When resetting the system at power-on, keep the RESET signal active until the oscillation settling time (approx.
40 ms, depending on the resonator being used) elapses.
Fig. 15-2 Reset Operation at Power-On
Reset ends
PC initialization
20/f
CLK
RESET
(input)
Internal reset signal
Delay Oscillation settling time
Execution of instruction
at reset start address
V DD
Remark f
CLK
: System clock frequency (f
XX
/2)
Delay Delay Delay
Reset starts Reset ends
PC initialization Execution of instruction
at reset start address
20/f CLK
RESET
(input)
Internal reset signal