NEC PD78214 - Manual (Page 64)

35
Chapter 2 Pin Functions
2
2.4 NOTES
(1) While the RESET signal is being applied, pins P60 to P63 are high impedance. When the RESET signal is
released, the output of these pins is low level. Design the peripheral circuit so that it operates satisfactorily
when pins P60 to P63 initially output the low level.
(2) When an I/O pin is used as both an input and output pin, connect the pin to the V
DD
pin through a resistor of
less than 100 kilohms. (Especially, when the RESET pin goes to a voltage higher than the low level upon power
on, or when an I/O pin is switched with software.)