NEC PD78214 - Manual (Page 281)

252
µ
PD78214 Sub-Series
Fig. 9-9 Baud Rate Generator Control Register (BRGC) Format
7 6 5 4 3 2 1 0
BRGC CE TPS2 TPS1 TPS0 MDL3 MDL2 MDL1 MDL0
MDL3 MDL2 MDL1 MDL0 k
Input clock of baud
rate generator
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
External clock input (ASCK)
f CLK /4
f
CLK
/2
f CLK /3
f
CLK
/4
f CLK /5
f
CLK
/6
f CLK /7
f CLK /8
f
CLK
/9
f
CLK
/10
f CLK /11
f CLK /12
f
CLK
/13
f CLK /14
f CLK /15
TPS2 TPS1 TPS0 Frequency divider tap 1/n
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
1/2
1/4
1/8
1/16
1/32
1/64
1/128
1/256
Operations of 4-bit counter and frequency divider CE
0
1
Stop
Counting operation