Avago Technologies LSI53C876E - Manual (Page 84)

3-12 Signal Descriptions
Table 3.8 describes the signals for the SCSI GPIO Function B Signals
group.
Table 3.8 SCSI GPIO Function B Signals
Name Pin No. Type Strength Description
B_GPIO0_
FETCH/ 84, U11 I/O 16 mA SCSI Function B General Purpose I/O pin 0.
Optionally, when driven LOW, indicates that the next
bus request is for an opcode fetch. This pin is
programmable at power-up through the MAD[7:6] pins
to serve as either the data or clock signal for the serial
EEPROM interface.
B_GPIO1_
MASTER/ 86, Y12 I/O 16 mA SCSI Function B General Purpose I/O pin 1.
Optionally, when driven LOW, indicates that the
LSI53C876 is bus master. This pin is programmable
at power-up through the MAD[7:6] pins to serve as
either the data or clock signal for the serial EEPROM
interface.
B_GPIO2 87, W12 I/O 16 mA SCSI Function B General Purpose I/O pin 2.
B_GPIO2 powers up as an input.
B_GPIO3 88, V12 I/O 16 mA SCSI Function B General Purpose I/O pin 3.
B_GPIO3 powers up as an input. Currently our drivers
use B_GPIO3 as a means to detect Diffsense.
B_GPIO4 89, U12 I/O 16 mA SCSI Function B General Purpose I/O pin 4.
B_GPIO4 powers up as an output. It can be used as
the enable line for VPP, the 12 V power supply to the
external Flash memory interface.