Ix-6 index – Avago Technologies LSI53C876E User Manual
Page 310

IX-6
Index
register bits (Cont.)
assert SCSI REQ/ signal
assert SCSI RST/ signal
assert SCSI SEL/ signal
burst disable
burst length
burst opcode fetch enable
bus fault
byte empty in DMA FIFO
byte full in DMA FIFO
byte offset counter
,
cache line size enable
chained mode
chip revision level
chip type
clear DMA FIFO
clear SCSI FIFO
clock address incrementor
clock byte counter
clock conversion factor
configured as I/O
configured as memory
connected
data acknowledge status
data request status
data transfer direction
destination I/O-memory enable
disable halt on parity error or ATN
disable single initiator response
DMA direction
DMA FIFO
DMA FIFO empty
DMA interrupt pending
enable parity checking
enable read line
enable read multiple
enable response to reselection
enable response to selection
enable wide SCSI
encoded chip SCSI ID, bits [3:0]
encoded destination SCSI ID
,
extend SREQ/SACK filtering
extra clock cycle of data setup
fetch enable
fetch pin mode
FIFO byte control
FIFO flags
,
flush DMA FIFO
function complete
,
general purpose timer expired
,
general purpose timer period
general purpose timer scale factor
GPIO enable
GPIO[4:0]
halt SCSI clock
handshake-to-handshake timer bus activity enable
handshake-to-handshake timer expired
,
handshake-to-handshake timer period
high impedance mode
illegal instruction detected
,
immediate arbitration
interrupt-on-the-fly
IRQ disable
last disconnect
latched SCSI parity
latched SCSI parity for SD[15:8]
lost arbitration
LSI53C700 family compatibility
manual start mode
master control for set or reset pulses
master data parity error
master enable
master parity error enable
max SCSI synchronous offset
parity error
phase mismatch
prefetch enable
prefetch flush
reselected
,
reset SCSI offset
SACK/ status
SATN/ status
SBSY/ status
SC_D/ status
SCRIPTS interrupt instruction received
,
SCSI C_D/ signal
SCSI control enable
SCSI data high impedance
SCSI disconnect unexpected
SCSI FIFO test read
SCSI FIFO test write
SCSI gross error
,
SCSI high impedance mode
SCSI I_O/ signal
SCSI interrupt pending
SCSI loopback mode
SCSI low level mode
SCSI MSG/ signal
SCSI parity error
SCSI phase mismatch - initiator mode
SCSI reset condition
SCSI RST/ received
SCSI RST/ signal
SCSI SDP0/ parity signal
SCSI SDP1 signal
SCSI selected as ID
SCSI synchronous offset maximum
SCSI synchronous offset zero
SCSI synchronous transfer period
SCSI true end of process
SCSI valid
select with SATN/ on a start sequence
selected
,
selection or reselection time-out
selection response logic test
selection time-out
semaphore
shadow register test mode
SI_O/ status
SIDL least significant byte full
SIDL most significant byte full
signal process
,
single-step interrupt
,
single-step mode
SLPAR high byte enable
SLPAR mode
SMSG/ status
SODL least significant byte full
SODL most significant byte full
SODR least significant byte full
SODR most significant byte full
software reset