Avago Technologies LSI53C876E - Manual (Page 72)

2-50 Functional Description
2.5.4 Power State D3
Power state D3 is the minimum power state, which includes subsettings
called D3hot and D3cold. D3hot allows the device to transition to D0
using software. The LSI53C876E is considered to be in power state
D3cold when power is removed from the device. D3cold can transition to
D0 by applying V
CC
and resetting the device.
Power state D3 is a lower power level than power state D2. In this state,
the LSI53C876 core is placed in the coma mode. Furthermore, the
function’s soft reset is continually asserted while in power state D3,
which clears all pending interrupts and 3-states the SCSI bus. In
addition, the device’s PCI
Command register is cleared. If both
LSI53C876E functions are placed in power state D3, the Phase Lock
Loop (PLL) is disabled, which results in further power savings.