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Scsi timer zero (stime0), Scsi timer, Zero (stime0) – Avago Technologies LSI53C876E User Manual

Page 177: Register: 0x48

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SCSI Registers

4-83

R

Reserved

5

GPIO[4:2]

GPIO Enable

[4:2]

General purpose control, corresponding to bit 4 in the

General Purpose (GPREG)

register and the GPIO4 pin.

GPIO4 powers-up as a general purpose output, and
GPIO[3:2] power-up as general purpose inputs.

GPIO[1:0]

GPIO Enable

[1:0]

These bits power-up set, causing the GPIO1 and GPIO0
pins to become inputs. Clearing these bits causes
GPIO[1:0] to become outputs.

Register: 0x48

SCSI Timer Zero (STIME0)
Read/Write

HTH

Handshake-to-Handshake Timer Period

[7:4]

These bits select the handshake-to-handshake time-out
period, the maximum time between SCSI handshakes
(SREQ/ to SREQ/ in target mode, or SACK/ to SACK/ in
initiator mode). When this timing is exceeded, an interrupt
is generated and the HTH bit in the

SCSI Interrupt Status

One (SIST1)

register is set. The following table contains

time-out periods for the Handshake-to-Handshake Timer,
the Selection/Reselection Timer (bits [3:0]), and the
General Purpose Timer (

SCSI Timer One (STIME1)

,

bits [3:0]). For a more detailed explanation of interrupts,
refer to

Chapter 2, “Functional Description.”

7

4

3

0

HTH[3:0]

SEL[3:0]

0

0

0

0

0

0

0

0