Avago Technologies LSI53C876E - Manual (Page 118)

4-24 Registers
selection of a SCSI target device. The SATN/ signal
informs the target that the LSI53C876 SCSI function has
a message to send. If a selection time-out occurs while
attempting to select a target device, SATN/ is deasserted
at the same time SSEL/ is deasserted. When this bit is
cleared, the SATN/ signal is not asserted during
selection. When executing SCSI SCRIPTS, this bit is
controlled by the SCRIPTS processor, but manual setting
is possible in low level mode.
EPC Enable Parity Checking 3
When this bit is set, the SCSI data bus is checked for odd
parity when data is received from the SCSI bus in either
the initiator or target mode. If a parity error is detected,
bit 0 of the
SCSI Interrupt Status Zero (SIST0) register is
set and an interrupt may be generated.
If the LSI53C876 SCSI function is operating in initiator
mode and a parity error is detected, assertion of SATN/
is optional, but the transfer continues until the target
changes phase. When this bit is cleared, parity errors are
not reported.
R Reserved 2
AAP Assert SATN/ on Parity Error 1
When this bit is set, the LSI53C876 SCSI function
automatically asserts the SATN/ signal upon detection of
a parity error. SATN/ is only asserted in initiator mode.
The SATN/ signal is asserted before deasserting SACK/
during the byte transfer with the parity error. Also set the
Enable Parity Checking bit for the LSI53C876 SCSI
function to assert SATN/ in this manner. A parity error is
detected on data received from the SCSI bus.
If the Assert SATN/ on Parity Error bit is cleared or the
Enable Parity Checking bit is cleared, SATN/ is not
automatically asserted on the SCSI bus when a parity
error is received.
TRG Target Mode 0
This bit determines the default operating mode of the
LSI53C876 SCSI function. The user must manually set
the target or initiator mode. This is done using the
SCRIPTS language (
SET TARGET or CLEAR TARGET ).