Avago Technologies LSI53C876E - Manual (Page 190)

4-96 Registers
Registers: 0x5C–0x5F
Scratch Register B (SCRATCHB)
Read/Write
SCRATCHB Scratch Register B [31:0]
This is a general purpose user definable scratch pad
register. Apart from CPU access, only register
Read/Write and Memory Moves directed at the
SCRATCH register alter its contents. When bit 3 in the
Chip Test Two (CTEST2) register is set, this register
contains the base address for the 4 Kbytes internal RAM.
Setting
Chip Test Two (CTEST2) , bit 3 only causes the
base address to appear in the SCRATCHB register; any
information previously in the register remains intact. Any
writes to this register while the bit is set pass through to
the actual
Scratch Register B (SCRATCHB) register. The
power-up values are indeterminate.
Registers: 0x60–0x7F
Scratch Registers C–J (SCRATCHC–SCRATCHJ)
Read/Write
These registers are general purpose scratch registers for user-defined
functions. They are accessible through read-modify-write functions.
31 0
SCRATCHB
x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x