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Scsi output data latch (sodl), Scsi output data latch, Sodl) – Avago Technologies LSI53C876E User Manual

Page 189: Scsi output, Data latch (sodl), Scsi bus data lines (sbdl), Scsi, Output data latch (sodl), Scsi output data, Latch (sodl)

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SCSI Registers

4-95

Registers: 0x54–0x55

SCSI Output Data Latch (SODL)
Read/Write

SODL

SCSI Output Data Latch

[15:0]

This register is used primarily for diagnostic testing or
programmed I/O operation. Data written to this register is
asserted onto the SCSI data bus by setting the Assert
Data Bus bit in the

SCSI Control One (SCNTL1)

register.

This register can send data using programmed I/O. Data
flows through this register when sending data in any
mode. It is also used to write to the synchronous data
FIFO when testing the chip. The power-up value of this
register is indeterminate.

Registers: 0x58–0x59

SCSI Bus Data Lines (SBDL)
Read Only

SBDL

SCSI Bus Data Lines

[15:0]

This register contains the SCSI data bus status. Even
though the SCSI data bus is active low, these bits are
active high. The signal status is not latched and is a true
representation of exactly what is on the data bus at the
time the register is read. This register is used when
receiving data using programmed I/O. This register can
also be used for diagnostic testing or in low level mode.
The power-up value of this register is indeterminate.

15

0

SODL

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

15

0

SBDL

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x

x