Avago Technologies LSI53C876E - Manual (Page 12)

xii Contents
2.4 SCSI Parity Errors and Interrupts 2-19
2.5 Differential Mode 2-25
2.6 Parallel ROM Support 2-44
2.7 Mode A Serial EEPROM Data Format 2-46
2.8 Mode C Serial EEPROM Data Format 2-47
2.9 Power States 2-48
3.1 System Signals 3-6
3.2 Address and Data Signals 3-7
3.3 Interface Control Signals 3-8
3.4 Arbitration Signals 3-9
3.5 Error Reporting Signals 3-9
3.6 PCI Interrupt Signals 3-10
3.7 SCSI GPIO Function A Signals 3-11
3.8 SCSI GPIO Function B Signals 3-12
3.9 SCSI Bus Interface Signal 3-13
3.10 SCSI Function A Interface Signals 3-14
3.11 SCSI Function B Interface Signals 3-15
3.12 SCSI Function A Differential Control Signals 3-16
3.13 SCSI Function B Differential Control Signals 3-17
3.14 ROM/Flash Interface Signals 3-18
3.15 Test Interface Signals 3-19
3.16 Power and Ground Signals 3-20
3.17 Decode of MAD Pins 3-22
4.1 PCI to SCSI Configuration Register Map 4-2
4.2 LSI53C876 SCSI Register Address Map 4-21
4.3 Examples of Synchronous Transfer Periods for SCSI-1
Transfer Rates
4-35
4.4 Example Transfer Periods for Fast SCSI and Wide Ultra
SCSI Transfer Rates
4-35
4.5 Maximum Synchronous Offset 4-36
4.6 SCSI Synchronous Data FIFO Word Count 4-46
5.1 SCRIPTS Instructions 5-3
5.2 Read/Write Instructions 5-25
6.1 Absolute Maximum Stress Ratings 6-2
6.2 Operating Conditions 6-2
6.3 SCSI Signals—SD[15:0]/, SDP[1:0]/, SREQ/, SACK/ 6-3
6.4 SCSI Signals—SMSG, SI_O/, SC_D/, SATN/, SBSY/,
SSEL/, SRST/
6-3