Avago Technologies LSI53C876E User Manual
Page 143
SCSI Registers
4-49
FF4
FIFO Flags, Bit 4
4
This is the most significant bit in the SCSI FIFO Flags
field, with the rest of the bits in
. For a complete description of this field, see the
definition for
bits [7:4].
SPL1
Latched SCSI Parity for SD[15:8]
3
This active HIGH bit reflects the SCSI odd parity signal
corresponding to the data latched into the most
significant byte in the
register.
R
Reserved
2
LDSC
Last Disconnect
1
This bit is used in conjunction with the Connected (CON)
bit in
. It allows the user to
detect the case in which a target device disconnects, and
then some SCSI device selects or reselects the
LSI53C876 SCSI function. If the Connected bit is
asserted and the LDSC bit is asserted, a disconnect is
indicated. This bit is set when the Connected bit in
SCNTL1 is off. This bit is cleared when a Block Move
instruction is executed while the Connected bit in
SCNTL1 is on.
SDP1
SCSI SDP1 Signal
0
This bit represents the active HIGH current state of the
SCSI SDP1 parity signal. It is unlatched and may change
as it is read.
Registers: 0x10–0x13
Data Structure Address (DSA)
Read/Write
DSA
Data Structure Address
[31:0]
This 32-bit register contains the base address used for all
table indirect calculations. The DSA register is usually
loaded prior to starting an I/O, but it is possible for a
SCRIPTS Memory Move to load the DSA during the I/O.
31
0
DSA
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x