Avago Technologies LSI53C876E - Manual (Page 107)

PCI Configuration Registers 4-13
Register: 0x30
Expansion ROM Base Address
Read/Write
ERBA Expansion ROM Base Address [31:0]
This four-byte register handles the base address and size
information for the expansion ROM. It functions exactly
like the Base Address registers, except that the encoding
of the bits is different. The upper 21 bits correspond to
the upper 21 bits of the expansion ROM base address.
The expansion ROM Enable bit, bit 0, is the only bit
defined in this register. This bit controls whether or not
the device accepts accesses to its expansion ROM.
When the bit is set, address decoding is enabled, and a
device is used with or without an expansion ROM
depending on the system configuration. To access the
external memory interface, also set the Memory Space
bit in the
Command register.
The host system detects the size of the external memory
by first writing the
Expansion ROM Base Address register
with all ones and then reading back the register. The
SCSI functions of the LSI53C876 respond with zeros in
all don’t care locations. The ones in the remaining bits
represent the binary version of the external memory size.
For example, to indicate an external memory size of
32 Kbytes, this register, when written with ones and read
back, returns ones in the upper 17 bits.
The ROM is accessed through the MAD bus which is
common to both SCSI functions in this device.
31 0
ERBA
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0