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Avago Technologies LSI53C876E User Manual

Page 208

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5-18

SCSI SCRIPTS Instruction Set

Wait Reselect Instruction
If the LSI53C876 is selected before being reselected, it
fetches the next instruction from the address pointed to
by the 32-bit jump address field stored in the

DMA Next

Address (DNAD)

register. Manually set the LSI53C876 to

Target mode when it is selected.

If the LSI53C876 is reselected, it fetches the next
instruction from the address pointed to by the

DMA

SCRIPTS Pointer (DSP)

register.

If the CPU sets the SIGP bit in the

Interrupt Status

(ISTAT)

register, the LSI53C876 aborts the Wait Reselect

instruction and fetches the next instruction from the
address pointed to by the 32-bit jump address field stored
in the

DMA Next Address (DNAD)

register.

Set Instruction
When the SACK/ or SATN/ bits are cleared, the
corresponding bits in the

SCSI Output Control Latch

(SOCL)

register are set. When the target bit is set, the

corresponding bit in the

SCSI Control Zero (SCNTL0)

register is also set. When the carry bit is set, the
corresponding bit in the ALU is set.

Clear Instruction
When the SACK/ or SATN/ bits are cleared, the
corresponding bits are cleared in the

SCSI Output Con-

trol Latch (SOCL)

register. When the target bit is cleared,

the corresponding bit in the

SCSI Control Zero (SCNTL0)

register is cleared. When the carry bit is cleared, the
corresponding bit in the ALU is cleared.

RA

Relative Addressing Mode

26

When this bit is set, the 24-bit signed value in the

DMA

Next Address (DNAD)

register is used as a relative

displacement from the current

DMA SCRIPTS Pointer

(DSP)

address. Use this bit only in conjunction with the

Select, Reselect, Wait Select, and Wait Reselect
instructions. The Select and Reselect instructions can
contain an absolute alternate jump address or a relative
transfer address.

TI

Table Indirect Mode

25

When this bit is set, the 24-bit signed value in the

DMA

Byte Counter (DBC)

register is added to the value in the