Avago Technologies LSI53C876E - Manual (Page 281)

AC Characteristics 6-49
Figure 6.24 Write Cycle, Normal/Fast Memory (
≥
128 Kbyte), Multiple Byte Access
(Cont.)
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
CLK
(Driven by System)
FRAME/
(Driven by Master)
AD/
(Driven by Master-Addr;
C_BE/
(Driven by Master)
IRDY/
(Driven by Master)
TRDY/
(Driven by LSI53C876)
STOP/
(Driven by LSI53C876)
(Driven by LSI53C876)
DEVSEL/
LSI53C876-Data)
PAR/
(Driven by Master-Addr;
LSI53C876-Data)
MAD/
(Driven by LSI53C876)
(Driven by LSI53C876)
MAS1/
(Driven by LSI53C876)
MAS0/
(Driven by LSI53C876)
MCE/
(Driven by LSI53C876)
MWE/
(Driven by LSI53C876)
MOE/
Byte Enable
Low Order
Address
In
Data In
Data Out