Avago Technologies LSI53C876E - Manual (Page 302)

B-2 External Memory Interface Diagram Examples
Figure B.2 64 Kbyte Interface with 150 ns Memory
LSI53C876
27C512-15/
MOE/
OE
MCE/
CE
8
MAD[7:0]
Bus
8
A[7:0]
8
A[15:8]
8
V
SS
MAS0/
MAS1/
8
Notes: MAD bus sense logic enabled for 64 Kbytes of fast memory (150 ns device @ 33 MHz). MAD3, MAD1,
and MAD0 pulled LOW internally.
GPIO4
MWE/
V
PP
Control
+ 12 V
V
PP
WE
Optional - for Flash Memory only, not
required for EEPROMS.
28F512-15/
Socket
D[7:0]
MAD3 4.7 K
MAD1 4.7 K
D0
D7
Q0
Q7
HCT374
CK 0E
D0
D7
Q0
Q7
HCT374
CK 0E