Avago Technologies LSI53C876E - Manual (Page 19)

LSI53C876 Benefits 1-5
power-down, so other devices on the bus are also protected from data
corruption. TolerANT technology is compatible with both the Alternative
One and Alternative Two termination schemes proposed by the American
National Standards Institute (ANSI).
1.3 LSI53C876 Benefits
This section provides an overview of the LSI53C876 features and
benefits. It contains information on
PCI Performance , SCSI Performance ,
Testability , Integration , and Reliability .
1.3.1 PCI Performance
To improve SCSI performance, the LSI53C876:
•
Complies with PCI 2.1 specification
•
Presents a single electrical load to the PCI bus (True PCI
multifunction device).
•
Supports 32-bit word data bursts with variable burst lengths of 2, 4,
8, 16, 32, 64 or 128 Dwords across the PCI bus.
•
Prefetches up to 8 Dwords of SCSI SCRIPTS.
•
Bursts SCSI SCRIPTS opcode fetches across the PCI bus.
•
Performs zero wait-state bus master data bursts up to 132 Mbytes/s
(@ 33 MHz).
•
Supports PCI Cache Line Size register.
•
Supports PCI Write and Invalidate, Read Line, and Read Multiple
commands.
•
Complies with PCI Bus Power Management Specification
(LSI53C876E) Revision 1.0.
1.3.2 SCSI Performance
To improve SCSI performance, the LSI53C876:
•
Includes 4 Kbytes internal RAM on each channel for SCRIPTS
instruction storage.
•
Wide Ultra SCSI SE Interface.