7 sample interrupt service routine – Avago Technologies LSI53C876E User Manual
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SCSI Functional Description
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2.2.10.7 Sample Interrupt Service Routine
The following is a sample of an interrupt service routine for the
LSI53C876. It can be repeated if polling is used, or should be called
when the INTA/ (or INTB/) pin is asserted during hardware interrupts.
1.
Read
.
2.
If the INTF bit is set, it must be written to a one to clear this status.
3.
If only the SIP bit is set, read
SCSI Interrupt Status Zero (SIST0)
and
SCSI Interrupt Status One (SIST1)
to clear the SCSI interrupt
condition and get the SCSI interrupt status. The bits in the SIST0
and SIST1 tell which SCSI interrupts occurred and determine what
action is required to service the interrupts.
4.
If only the DIP bit is set, read the
to clear the
interrupt condition and get the DMA interrupt status. The bits in the
DSTAT tells which DMA interrupts occurred and determine what
action is required to service the interrupts.
5.
If both the SIP and DIP bits are set, read
,
SCSI Interrupt Status One (SIST1)
, and
to clear the SCSI and DMA interrupt condition and get the
interrupt status. If using 8-bit reads of the SIST0, SIST1, and DSTAT
registers to clear interrupts, insert a 12 CLK delay between the
consecutive reads to ensure that the interrupts clear properly. Both
the SCSI and DMA interrupt conditions should be handled before
leaving the interrupt service routine. It is recommended that the DMA
interrupt is serviced before the SCSI interrupt, because a serious
DMA interrupt condition could influence how the SCSI interrupt is
acted upon.
6.
When using polled interrupts, go back to Step 1 before leaving the
interrupt service routine, in case any stacked interrupts moved in
when the first interrupt was cleared. When using hardware interrupts,
the INTA/ (or INTB/) pin is asserted again if there are any stacked
interrupts. This should cause the system to re-enter the interrupt
service routine.