Altera Arria V Hard IP for PCI Express - Manual (Page 97)

Chapter 6: IP Core Architecture 6–23
Single DWord Completer Endpoint
December 2013 Altera Corporation Arria V Hard IP for PCI Express
User Guide
Figure 6–13 shows Qsys system that includes a completer-only single dword
endpoint.
As Figure 6–13 illustrates, the completer-only single dword Endpoint connects to PCI
Express Root Complex. A bridge component includes the Arria V Hard IP for PCI
Express TX and RX blocks, an Avalon-MM RX master, and an interrupt handler. The
bridge connects to the FPGA fabric using an Avalon-MM interface. The following
sections provide an overview of each block in the bridge.
RX Block
The RX Block control logic interfaces to the hard IP block to respond to requests from
the root complex. It supports memory reads and writes of a single dword. It generates
a completion with Completer Abort (CA) status for read requests greater than four
bytes and discards all write data without further action for write requests greater than
four bytes.
The RX block passes header information to the Avalon-MM master, which generates
the corresponding transaction to the Avalon-MM interface. The bridge accepts no
additional requests while a request is being processed. While processing a read
request, the RX block deasserts the
ready signal until the TX block sends the
corresponding completion packet to the hard IP block. While processing a write
request, the RX block sends the request to the Avalon-MM interconnect fabric before
accepting the next request.
Avalon-MM RX Master Block
The 32-bit Avalon-MM master connects to the Avalon-MM interconnect fabric. It
drives read and write requests to the connected Avalon-MM slaves, performing the
required address translation. The RX master supports all legal combinations of byte
enables for both read and write requests.
Figure 6–13. Qsys Design Including Completer Only Single DWord Endpoint for PCI Express
Qsys System
PCI Express
Root Complex
PCIe Link
to Host
CPU
Avalon-MM
Interconnect
Fabric
Avalon-MM
Slave
Avalon-MM
Slave
Avalon-MM
Hard IP
for PCIe
Avalon-MM
Master RX
Interrupt
Handler
RX Block
TX Block
Completer Only Single DWord Endpoint
Qsys Component
.
.
.
Bridge