Altera Arria V Hard IP for PCI Express User Manual
Page 243
Chapter 17: Testbench and Design Example
17–21
Root Port BFM
December 2013
Altera Corporation
Arria V Hard IP for PCI Express
User Guide
The functionality of each of the modules included in
is explained below.
■
BFM shared memory (altpcietb_bfm_shmem_common Verilog HDL include
file)—The Root Port BFM is based on the BFM memory that is used for the
following purposes:
■
Storing data received with all completions from the PCI Express link.
■
Storing data received with all write transactions received from the PCI Express
link.
■
Sourcing data for all completions in response to read transactions received
from the PCI Express link.
■
Sourcing data for most write transactions issued to the PCI Express link. The
only exception is certain BFM write procedures that have a four-byte field of
write data passed in the call.
■
Storing a data structure that contains the sizes of and the values programmed
in the BARs of the Endpoint.
A set of procedures is provided to read, write, fill, and check the shared memory from
the BFM driver. For details on these procedures, see
■
BFM Read/Write Request Functions(altpcietb_bfm_driver_rp.v)—These
functions provide the basic BFM calls for PCI Express read and write requests. For
details on these procedures, see
“BFM Read and Write Procedures” on page 17–28
■
BFM Configuration Functions(altpcietb_bfm_driver_rp.v)—These functions
provide the BFM calls to request configuration of the PCI Express link and the
Endpoint Configuration Space registers. For details on these procedures and
functions, see
“BFM Configuration Procedures” on page 17–34
■
BFM Log Interface(altpcietb_bfm_driver_rp.v)—The BFM log functions provides
routines for writing commonly formatted messages to the simulator standard
output and optionally to a log file. It also provides controls that stop simulation on
errors. For details on these procedures, see
“BFM Log and Message Procedures”
.
■
BFM Request Interface(altpcietb_bfm_driver_rp.v)—This interface provides the
low-level interface between the
altpcietb_bfm_rdwr
and
altpcietb_bfm_configure
procedures or functions and the Root Port RTL Model.
This interface stores a write-protected data structure containing the sizes and the
values programmed in the BAR registers of the Endpoint, as well as, other critical
data used for internal BFM management. You do not need to access these files
directly to adapt the testbench to test your Endpoint application.
■
Avalon-ST Interfaces (altpcietb_bfm_vc_intf.v)—These interface modules handle
the Root Port interface model. They take requests from the BFM request interface
and generate the required PCI Express transactions. They handle completions
received from the PCI Express link and notify the BFM request interface when
requests are complete. Additionally, they handle any requests received from the
PCI Express link, and store or fetch data from the shared memory before
generating the required completions.