Altera Arria V Hard IP for PCI Express - Manual (Page 255)

Chapter 17: Testbench and Design Example 17–33
BFM Procedures and Functions
December 2013 Altera Corporation Arria V Hard IP for PCI Express
User Guide
ebfm_cfgrd_wait Procedure
The ebfm_cfgrd_wait procedure reads up to four bytes of data from the specified
configuration register and stores the data in BFM shared memory. This procedure
waits until the read completion has been returned.
ebfm_cfgrd_nowt Procedure
The ebfm_cfgrd_nowt procedure reads up to four bytes of data from the specified
configuration register and stores the data in the BFM shared memory. This procedure
returns as soon as the VC interface module has accepted the transaction, allowing
other reads to be issued in the interim. Use this procedure only when successful
completion status is expected and a subsequent read or write with a wait can be used
to guarantee the completion of this operation.
Table 17–26. ebfm_cfgrd_wait Procedure
Location altpcietb_bfm_driver_rp.v
Syntax ebfm_cfgrd_wait(bus_num, dev_num, fnc_num, regb_ad, regb_ln, lcladdr, compl_status)
Arguments
bus_num PCI Express bus number of the target device.
dev_num PCI Express device number of the target device.
fnc_num Function number in the target device to be accessed.
regb_ad Byte-specific address of the register to be written.
regb_ln
Length, in bytes, of the data read. Maximum length is four bytes. The regb_ln and the
regb_ad arguments cannot cross a DWORD boundary.
lcladdr BFM shared memory address of where the read data should be placed.
compl_status
Completion status for the configuration transaction.
This argument is reg [2:0].
In both languages, this is the completion status as specified in the PCI Express
specification:
Compl_Status Definition
000 SC— Successful completion
001 UR— Unsupported Request
010 CRS — Configuration Request Retry Status
100 CA — Completer Abort
Table 17–27. ebfm_cfgrd_nowt Procedure
Location altpcietb_bfm_driver_rp.v
Syntax ebfm_cfgrd_nowt(bus_num, dev_num, fnc_num, regb_ad, regb_ln, lcladdr)
Arguments bus_num PCI Express bus number of the target device.
dev_num PCI Express device number of the target device.
fnc_num Function number in the target device to be accessed.
regb_ad Byte-specific address of the register to be written.
regb_ln
Length, in bytes, of the data written. Maximum length is four bytes. The regb_ln and
regb_ad arguments cannot cross a DWORD boundary.
lcladdr BFM shared memory address where the read data should be placed.