1 overview, 2 features – Intel PXA26X User Manual
Page 549
Intel® PXA26x Processor Family Developer’s Manual
16-1
Network/Audio Synchronous Serial
Protocol Serial Ports
16
This chapter describes the signal definitions and operation of the Intel® PXA26x Processor Family
Network and Audio Synchronous Serial Protocol (SSP) serial ports. The Network SSP (NSSP) and
Audio SSP (ASSP) are similar except for the following:
•
External pin connections
•
Memory map base location
•
The Network ASSP supports swapping the receive and transmit data pins. See
“General-Purpose Input/Output” on page 4-1
The NSSP and ASSP are configured differently than the SSPC.
16.1
Overview
The NSSP and ASSP ports are a synchronous serial interface that connect to a variety of external
analog-to-digital (A/D) converters, audio and telecommunication CODECs, and many other
devices that use serial protocols for data transfer. The SSP ports provide support for the following
protocols:
•
Texas Instruments (TI) Synchronous Serial Protocol*
•
Motorola Serial Peripheral Interface* (SPI) protocol
•
National Semiconductor Microwire*
•
Programmable Serial Protocol (PSP)
The NSSP and ASSP ports operate as full-duplex devices for the TI Synchronous Serial Protocol*,
SPI*, and PSP protocols and as half-duplex devices for the Microwire* protocol.
The FIFOs can be loaded or emptied by the CPU using programmed I/O or DMA burst transfers.
16.2
Features
•
Supports the TI Synchronous Serial Protocol*, the Motorola SPI* protocol, National
Semiconductor Microwire*, and a Programmable Serial Protocol (PSP)
•
Two independent transmit and receive FIFOs, each 16 samples deep by 32-bits wide
•
Sample sizes from four to 32-bits
•
Maximum bit rate of 13 Mbps in slave of clock mode, requires using DMA
•
Master-mode and slave-mode operation
•
Receive-without-transmit operation