Intel PXA26X - Manual (Page 354)

9-16 Intel® PXA26x Processor Family Developer’s Manual
Inter-Integrated Circuit Bus Interface Unit
Figure 9-11 through Figure 9-13 are examples of I
2
C transactions and show the relationships
between master and slave devices.
9.4.7 General Call Address
A general call address is a transaction with a slave address of 0x00. When a device requires the
data from a general call address, it acknowledges the transaction and stays in slave-receiver mode.
Otherwise, the device ignores the general call address. The other bytes in a general call transaction
are acknowledged by every device that uses it on the bus. Devices that do not use these bytes must
not send an ACK. The meaning of a general call address is defined in the second byte sent by the
Figure 9-11. Master-Transmitter Write to Slave-Receiver
Figure 9-12. Master-Receiver Read to Slave-Transmitter
Figure 9-13. Master-Receiver Read to Slave-Transmitter, Repeated START, Master-Transmitter
Write to Slave-Receiver
Master to Slave Slave to Master
START Slave Address
R/nW
0
ACK
Data
Byte
ACK
Data
Byte
STOP
N Bytes + ACK Write
ACK
First Byte
Master to Slave Slave to Master
START Slave Address
R/nW
1
ACK
Data
Byte
ACK
Data
Byte
STOP
N Bytes + ACK Read
NAK
Default
Slave-Receive
Mode
First Byte
START
Slave R/nW
1
ACK
Data
Byte
ACK
Data
Byte
N Bytes + ACK Read
ACK SR
Slave R/nW
0
ACK
Data
Byte
ACK
Data
Byte
STOP
N Bytes + ACK Write
ACK Address Address
Master to Slave Slave to Master
Repeated
START
Data Chaining