Intel PXA26X - Manual (Page 130)

4-22 Intel® PXA26x Processor Family Developer’s Manual
System Integration Unit
4.2 Interrupt Controller
The Interrupt Controller controls the interrupt sources available to the processor and also contains
the location to determine the first level source of all interrupts. It also determines whether
interrupts cause an IRQ or an FIQ to occur and masks the interrupts. The interrupt controller only
supports a single priority level, however, interrupts can be routed to either IRQs or FIQ, with FIQs
having priority over IRQs.
0x40E0_0010 GPDR1 GPIO pin direction register GPIO[63:32]
0x40E0_0014 GPDR2 GPIO pin direction register GPIO[89:64]
0x40E0_0018 GPSR0 GPIO pin output set register GPIO[31:0]
0x40E0_001C GPSR1 GPIO pin output set register GPIO[63:32]
0x40E0_0020 GPSR2 GPIO pin output set register GPIO[89:64]
0x40E0_0024 GPCR0 GPIO pin output clear register GPIO[31:0]
0x40E0_0028 GPCR1 GPIO pin output clear register GPIO[63:32]
0x40E0_002C GPCR2 GPIO pin output clear register GPIO[89:64]
0x40E0_0030 GRER0
GPIO rising-edge detect enable register
GPIO[31:0]
0x40E0_0034 GRER1
GPIO rising-edge detect enable register
GPIO[63:32]
0x40E0_0038 GRER2
GPIO rising-edge detect enable register
GPIO[89:64]
0x40E0_003C GFER0
GPIO falling-edge detect enable register
GPIO[31:0]
0x40E0_0040 GFER1
GPIO falling-edge detect enable register
GPIO[63:32]
0x40E0_0044 GFER2
GPIO falling-edge detect enable register
GPIO[89:64]
0x40E0_0048 GEDR0 GPIO edge detect status register GPIO[31:0]
0x40E0_004C GEDR1 GPIO edge detect status register GPIO[63:32]
0x40E0_0050 GEDR2 GPIO edge detect status register GPIO[89:64]
0x40E0_0054 GAFR0_L GPIO alternate function select register GPIO[15:0]
0x40E0_0058 GAFR0_U
GPIO alternate function select register
GPIO[31:16]
0x40E0_005C GAFR1_L
GPIO alternate function select register
GPIO[47:32]
0x40E0_0060 GAFR1_U
GPIO alternate function select register
GPIO[63:48]
0x40E0_0064 GAFR2_L
GPIO alternate function select register
GPIO[79:64]
0x40E0_0068 GAFR2_U
GPIO alternate function select register
GPIO[89:80]
Table 4-30. GPIO Register Addresses (Sheet 2 of 2)