Figure 13-10. mic-in receive-only operation, 13 modem-out control register (mocr), Table 13-19. modem-out control register – Intel PXA26X User Manual
Page 491
Intel® PXA26x Processor Family Developer’s Manual
13-29
AC97 Controller Unit
13.8.3.13
Modem-Out Control Register (MOCR)
Figure 13-10. Mic-in Receive-Only Operation
Table 13-19. Modem-Out Control Register
Physical Address
4050_0100
MOCR Register
AC97
Bit
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
Reserved
FE
IE
R
eser
ved
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bits
Name
Description
31:4
—
Reserved
3
FEIE
FIFO ERROR INTERRUPT ENABLE (FEIE):
This bit controls whether the occurrence of a transmit FIFO error will cause an interrupt or
not.
0 – No interrupt occurs even if bit 4 in the MOSR is set
1 – An interrupt occurs if bit 4 in the MOSR is set.
2:0
—
Reserved
RxEntry0
RxEntry1
RxEntry2
RxEntry3
RxEntry15
15
0
Processor/DMA
RxFIFO
Read
Mic-in Receive FIFO
MCDR Register
31
0
15
16
0x0000
Read
Receive
Data