Intel PXA26X - Manual (Page 218)

6-28 Intel® PXA26x Processor Family Developer’s Manual
Memory Controller
Figure 6-7. SDRAM Read With a Second Read to Same Bank, Different Row
Figure 6-8. SDRAM Read With a Second Read to a Different Bank
CL CL tRCD tRCD tRP
tRAS
tRP CL CL tRCD
tRAS
tRCD
row col
0 1 2 3
0000
tRP = 2 clks
tRAS = 7 clks
tRCD = 2 clks
CL = 2 clks
bank row
4 5 6 7
col
0000
0ns 50ns 100ns 150ns
SDCLK
nSDCS
MA[24:0]
nSDRAS
nSDCAS
nWE
DATA
DQM[3:0]
CL CL tRCD tRCD
tRP
CL
tRP
CL tRCD tRCD
row col
0 1 2 3
0000
tRP = 2 clks
tRAS = 7 clks
tRCD = 2 clks
CL = 2 clks
bank0 row
1 2 3 4
col
0ns 25ns 50ns 75ns 100ns 125ns
SDCLK
nSDCS
MA[24:0]
nSDRAS
nSDCAS
nWE
DATA
DQM[3:0]