Intel PXA26X - Manual (Page 219)

Intel® PXA26x Processor Family Developer’s Manual 6-29
Memory Controller
Figure 6-9. SDRAM Write
Figure 6-10. SDRAM Write With a Second Write to Same Bank, Same Row
CL tRCD CL tRCD
row col
0 1 2 3
mask0 mask1 mask3 mask2
tRP = 2 clks
tRCD = 2 clks
tRAS = 2 clks
CL = 2 clks
0ns 25ns 50ns 75ns
SDCLK
nSDCS
MA[24:0]
nSDRAS
nSDCAS
nWE
DATA
DQM[3:0]
CL tRCD CL tRCD
row col
0 1 2 3
mask0 mask1 mask3 mask2
tRP = 2 clks
tRCD = 2 clks
tRAS = 2 clks
CL = 2 clks
col
4 5 6 7
mask4 mask5 mask6 mask7
0ns 25ns 50ns 75ns 100ns
SDCLK
nSDCS
MA[24:0]
nSDRAS
nSDCAS
nWE
DATA
DQM[3:0]