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3 flush tx fifo (ftf), 4 transmit underrun (tur), 5 bit 4 reserved – Intel PXA26X User Manual

Page 442: 6 bit 5 reserved, 7 bit 6 reserved, 8 transmit short packet (tsp)

3 flush tx fifo (ftf), 4 transmit underrun (tur), 5 bit 4 reserved | 6 bit 5 reserved, 7 bit 6 reserved, 8 transmit short packet (tsp) | Intel PXA26X User Manual | Page 442 / 624 3 flush tx fifo (ftf), 4 transmit underrun (tur), 5 bit 4 reserved | 6 bit 5 reserved, 7 bit 6 reserved, 8 transmit short packet (tsp) | Intel PXA26X User Manual | Page 442 / 624
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