Z8018x family mpu user manual – Zilog Z80180 User Manual
Page 313
Z8018x
Family MPU User Manual
UM005003-0703
297
CSI/O Transmit/
Receive Data Register:
Timer Data Register
Channel 0L:
Timer Data Register
Channel 0H:
Timer Reload Register
Channel 0L:
Timer Reload Register
Channel 0H:
Timer Control Register
Channel 0L:
TRDR
TMDR0L
TMDR0H
RLDR0L
RLDR0H
TCR
0
B
0
C
0
D
0
E
0
F
1
0
Table 57. Internal I/O Registers (Continued)
Register
Mnemonics Address
Remarks
R
R
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
TF1
TF0
TE1
TOC0
TDE1
TDE0
TE0
0
bit
during RESET
R/W
TOC1
A
18
/TOUT
0 0
Inhibited
TOC1,0
Timer Down
Count Enable 1,0
Timer Output Control 1,0
Timer Interrupt Enable 1,0
Timer Interrupt Flag 1,0
Toggle
0
1
0 1
1 0
1 1