Z8018x family mpu user manual – Zilog Z80180 User Manual
Page 279
Z8018x
Family MPU User Manual
UM005003-0703
263
LD (IX+d),m
LD (IY+d),m
MC1
T1T2T3 1st Op Code
Address
1st Op
Code
0
1
0
1
0
1
0
MC2
T1T2T3 2nd Op Code
Address
2nd Op
Code
0
1
0
1
0
1
1
MC3
T1T2T3 1st operand
Address
d
0
1
0
1
1
1
1
MC4
T1T2T3 2nd operand
Address
m
0
1
0
1
1
1
1
MC5
T1T2T3 IX+ d
IY+d
DATA
1
0
0
1
1
1
1
LD A, (BC)
LD A, (DE)
MC1
T1T2T3 1st Op Code
Address
1st Op
Code
0
1
0
1
0
1
0
MC2
T1T2T3 BC
DE
DATA
0
1
0
1
1
1
1
LD A,(mn)
MC1
T1T2T3 1st Op Code
Address
1st Op
Code
0
1
0
1
0
1
0
MC2
T1T2T3 1st operand
Address
n
0
1
0
1
1
1
1
MC3
T1T2T3 2nd operand
Address
m
0
1
0
1
1
1
1
MC4
T1T2T3 mn
DATA
0
1
0
1
1
1
1
LD (BC),A
LD (DE),A
MC1
T1T2T3 1st Op Code
Address
1st Op
Code
0
1
0
1
0
1
0
MC2
Ti
*
Z
1
1
1
1
1
1
1
MC3
T1T2T3 BC
DE
A
1
0
0
1
1
1
1
Table 51. Bus and Control Signal Condition in Each Machine Cycle (Continued)
Instruction
Machine
Cycle
States
Address
Data
RD WR MREQ
IORQ M1 HALT ST