Zilog Z80180 - Manual (Page 217)

Z8018x
Family MPU User Manual
UM005003-0703
201
Figure 85. E Clock Timing (Memory R/W Cycle) (I/O R/W Cycle)
Figure 86. E Clock Timing (BUS RELEASE Mode, SLEEP Mode, and
SYSTEM STOP Mode
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49
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15
50
50
50
16
D
0
–D
7
E
(Memory Read/Write)
E
(I/O Read)
E
(I/O Write)
PHI
~~
~~
~~
~~
~~
~~
T
1
T
2
T
W
T
W
T
3
PHI
E
BUS RELEASE mode
SLEEP mode
SYSTEM STOP mode
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