Zilog Z80180 User Manual
Page 259
Z8018x
Family MPU User Manual
UM005003-0703
243
PUSH IX
2
6
14
PUSH IY
2
6
14
PUSH zz
1
5
11
RES b,(HL)
2
5
13
RES b,(IX+d)
4
7
19
RES b,(IY+d)
4
7
19
RES b,g
2
3
7
RET
1
3
9
RET f
1
3
5
(If condition is false)
1
4
10
(If condition is true)
RETI
2
4 (R0, R1) 12 (R0, R1)
10 (Z)
22 (Z)
RETN
2
4
12
RLA
1
1
3
RLCA
1
1
3
RLC (HL)
2
5
13
RLC (IX-1-dl
4
7
19
RLC (IY+d)
4
7
19
RLC g
2
3
7
RLD
2
8
16
RL (HL)
2
5
13
RL (IX+d)
4
7
19
RL (IY+d)
4
7
19
RL g
2
3
7
RRA
1
1
3
RRCA
1
1
3
RRC (HL)
2
5
13
RRC (IX+d)
4
7
19
MNEMONICS
Bytes
Machine
Cycles
States