Zilog Z80180 User Manual
Page 282
Z8018x
Family MPU User Manual
266
UM005003-0703
LD (mn),HL
MC1
T1T2T3 1st Op Code
Address
1st Op
Code
0
1
0
1
0
1
0
MC2
T1T2T3 1st operand
Address
n
0
1
0
1
1
1
1
MC3
T1T2T3 2nd operand
Address
m
0
1
0
1
1
1
1
MC4
Ti
*
Z
1
1
1
1
1
1
1
MC5
T1T2T3 mn
L
1
0
0
1
1
1
1
MC6
T1T2T3 mn+1
H
1
0
0
1
1
1
1
LD (mn),ww
MC1
T1T2T3 1st Op Code
Address
1st Op
Code
0
1
0
1
0
1
0
MC2
T1T2T3 2nd Op Code
Address
2nd Op
Code
0
1
0
1
0
1
1
MC3
T1T2T3 1st operand
Address
n
0
1
0
1
1
1
1
MC4
T1T2T3 2nd operand
Address
m
0
1
0
1
1
1
1
MC5
Ti
*
Z
1
1
1
1
1
1
1
MC6
T1T2T3 mn
wwL
1
0
0
1
1
1
1
MC7
T1T2T3 mn+1
wwH
1
0
0
1
1
1
1
Table 51. Bus and Control Signal Condition in Each Machine Cycle (Continued)
Instruction
Machine
Cycle
States
Address
Data
RD WR MREQ
IORQ M1 HALT ST