I/o registers, Internal i/o registers, 0000h – Zilog Z80180 User Manual
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Z8018x
Family MPU User Manual
293
UM005003-0703
I/O Registers
INTERNAL I/O REGISTERS
By programming IOA7 and IOA6 as the I/O control register, internal I/O
register addresses are relocatable within ranges from
0000H
to
00FFH
in
the I/O address space.
Table 57. Internal I/O Registers
Register
Mnemonics Address
Remarks
ASCI Control Register A
Channel 0:
CNTLA0 0
0
ASCI Control Register A
Channel 1:
CNTLA1 0
1
MPE
RE
TE
RTS0
MPBR/
EFR
MOD2 MOD1
MOD0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
MODE Selection
Multi Processor Bit Receive/
Error Flag Reset
Request to Send
Transmit Enable
Receive Enable
Multi Processor Enable
invalid
0
1
0
0
0
0
0
1
bit
during RESET
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
MODE Selection
Multi Processor Bit Receive/
Error Flag Reset
0
0
1
0
0
0
0
MPE
RE
TE
MOD2 MOD1 MOD0
CKA1D
MPBR/
EFR
invalid
Transmit Enable
Receive Enable
Multi Processor Enable
CKA1 Disable
MOD 2 1 0
0 0 0 Start + 7 bit Data + 1 Stop
0 0 1 Start + 7 bit Data + 2 Stop
0 1 0 Start + 7 bit Data + Parity + 1 Stop
0 1 1 Start + 7 bit Data + Parity + 2 Stop
1 0 0 Start + 8 bit Data + 1 Stop
1 0 1 Start + 8 bit Data + 2 Stop
1 1 0 Start + 8 bit Data + Parity + 1 Stop
1 1 1 Start + 8 bit Data + Parity + 2 Stop
bit
during RESET
R/W