Digi NS9215 - Manual (Page 70)

I / O C O N T R O L M O D U L E
GPIO Control registers
70 Hardware Reference NS9215
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G P I O C o n t r o l r e g i s t e r s
GPIO Control Registers #0 through #3 contain the control information for each of the
108 GPIO pins. When a GPIO pin is configured as a GPIO output, the corresponding
bit in GPIO Control Registers #0 through #3 is driven out the GPIO pin. In all
configurations, the CPU has read/write access to these registers.
GPIO Control
Register #0
Address: A090_206C
Bit(s) Access Mnemonic Reset Description
D00 R/W GPIO0 0 GPIO[0] control bit
D01 R/W GPIO1 0 GPIO[1] control bit
D02 R/W GPIO2 0 GPIO[2] control bit
D03 R/W GPIO3 0 GPIO[3] control bit
D04 R/W GPIO4 0 GPIO[4] control bit
D05 R/W GPIO5 0 GPIO[5] control bit
D06 R/W GPIO6 0 GPIO[6] control bit
D07 R/W GPIO7 0 GPIO[7] control bit
D08 R/W GPIO8 0 GPIO[8] control bit
D09 R/W GPIO9 0 GPIO[9] control bit
D10 R/W GPIO10 0 GPIO[10] control bit
D11 R/W GPIO11 0 GPIO[11] control bit
D12 R/W GPIO12 0 GPIO[12] control bit
D13 R/W GPIO13 0 GPIO[13] control bit
D14 R/W GPIO14 0 GPIO[14] control bit
D15 R/W GPIO15 0 GPIO[15] control bit
D16 R/W GPIO16 0 GPIO[16] control bit
D17 R/W GPIO17 0 GPIO[17] control bit
D18 R/W GPIO18 0 GPIO[18] control bit
D19 R/W GPIO19 0 GPIO[19] control bit
D20 R/W GPIO20 0 GPIO[20] control bit
D21 R/W GPIO21 0 GPIO[21] control bit
D22 R/W GPIO22 0 GPIO[22] control bit
D23 R/W GPIO23 0 GPIO[23] control bit
D24 R/W GPIO24 0 GPIO[24] control bit