Digi NS9215 - Manual (Page 10)

10 Hardware Reference NS9215
High speed bus system ................................................................138
High-speed bus arbiters...............................................................138
How the bus arbiter works ...........................................................138
Ownership...............................................................................139
Locked bus sequence..................................................................139
Relinquishing the bus .................................................................139
SPLIT transfers .........................................................................140
Arbiter configuration example.......................................................140
Address decoding .............................................................................141
Programmable timers ........................................................................142
Software watchdog timer ............................................................142
General purpose timers/counters..........................................................143
Source clock frequency ...............................................................143
GPTC characteristics ..................................................................143
Control field ............................................................................143
16-bit mode options ...................................................................144
Basic PWM function ..........................................................................144
Functional block diagram.............................................................144
Enhanced PWM function .....................................................................145
Sample enhanced PWM waveform ..................................................145
Quadrature decoder function...............................................................145
How the quadrature decoder/counter works ............................................146
Provides input signals .................................................................146
Monitors how far the encoder has moved..........................................147
Digital filter ............................................................................147
Testing signals..........................................................................147
Timer support ..........................................................................147
Interrupt controller ..........................................................................148
FIQ interrupts ..........................................................................148
IRQ interrupts ..........................................................................148
32-vector interrupt controller .......................................................148
IRQ characteristics ....................................................................149
Interrupt sources ......................................................................149
Vectored interrupt controller (VIC) flow..................................................151
Configurable system attributes.............................................................151
PLL configuration .............................................................................151
PLL configuration and control system block diagram ............................152
Bootstrap initialization ......................................................................152
Configuring the powerup settings ...................................................152
System configuration registers .............................................................154
Register address map .................................................................154
General Arbiter Control register ...........................................................158
BRC0, BRC1, BRC2, and BRC3 registers ...................................................158
Channel allocation.....................................................................159
AHB Error Detect Status 1 ...................................................................159