Software watchdog timer – Digi NS9215 User Manual
Page 179
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S Y S T E M C O N T R O L M O D U L E
Software Watchdog Timer
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179
Register bit
assignment
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S o f t w a r e W a t c h d o g T i m e r
Address: A090 0178
The Software Watchdog Timer register services the watchdog timer.
Bits
Access
Mnemonic
Reset
Description
D31:09
NA
Reserved
N/A
N/A
D08
R/W
Debug
0x0
Debug mode
0
Timer enabled in CPU debug mode
1
Timer disabled in CPU debug mode
D07
R/W
SWWE
0x0
Software watchdog enable
0
Software watchdog disabled
1
Software watchdog enabled; once set, cannot be
cleared
D06
N/A
Reserved
N/A
N/A
D05
R/W
SWWI
0x0
Software watchdog interrupt clear
Write a 1, then a 0 to this register to clear the
software watchdog interrupt.
D04
R/W
SWWIC
0x0
Software watchdog interrupt response
0
Generate interrupt
1
Generate reset
Note:
If the interrupt option is selected and a
software watchdog timeout occurs and the
interrupt has not been cleared from a pre-
vious timeout, the reset is asserted.
D03
N/A
Reserved
N/A
N/A
D02:00
R/W
SWTCS
0x0
Software watchdog timer clock select
000
System memory clock / 2
001
System memory clock / 4
010
System memory clock / 8
011
System memory clock / 16
100
System memory clock / 32
101
System memory clock / 64
110
Reserved
111
Reserved