Registerhash tables, Register register bit assignment – Digi NS9215 User Manual
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E T H E R N E T C O M M U N I C A T I O N M O D U L E
RegisterHash Tables
302
Hardware Reference NS9215
Register
Register bit
assignment
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
R e g i s t e r H a s h T a b l e s
The MAC receiver provides the station address logic with a 6-bit CRC value that is
the upper six bits of a 32-bit CRC calculation performed on the 48-bit multicast
destination address. This 6-bit value addresses the 64-bit multicast hash table
created in HT1 (hash table 1) and HT2 (hash table 2). If the current receive frame is
a multicast frame and the 6-bit CRC addresses a bit in the hash table that is set to
1, the receive frame will be accepted; otherwise, the receive frame is rejected.
HT1 stores enables for the lower 32 CRC addresses; HT2 stores enables for the
upper 32 CRC addresses.
HT1
Address: A060 0504
Register bit assignment
Reserved
PRO
BROAD
13
12
11
10
9
8
7
6
5
4
3
2
1
0
15
14
31
29
28
27
26
25
24
23
22
21
20
19
18
17
16
30
Reserved
PRM
PRA
Bits
Access
Mnemonic
Reset
Description
D31:04
N/A
Reserved
N/A
N/A
D03
R/W
PRO
0
Enable promiscuous mode; receive all frames
D02
R/W
PRM
0
Accept all multicast frames
D01
R/W
PRA
0
Accept multicast frames using the hash table
D00
R/W
BROAD
0
Accept all broadcast frames
Bits
Access
Mnemonic
Reset
Description
D31:00
R/W
HT1
0x00000000
CRC 31:00
HT1
13
12
11
10
9
8
7
6
5
4
3
2
1
0
15
14
31
29
28
27
26
25
24
23
22
21
20
19
18
17
16
30
HT1