Digi NS9215 - Manual (Page 217)

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M E M O R Y C O N T R O L L E R
Static memory Write: Timing and parameters
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External memory
write transfer
with two wait
states
This diagram shows a single external memory write transfer with two wait states
(
WAITWR=2 ). One AHB wait state is added.
External memory
write transfer
with two write
enable delay
states
This diagram shows a single external memory write transfer with two write enable
delay states (
WAITWEN=2 ). One wait state is added.
Timing parameters Value
WAITRD N/A
WAITOEN N/A
WAITPAGE N/A
WAITWR 0
WAITWEN 0
WAITTURN N/A
Timing parameter Value
WAITRD N/A
WAITOEN N/A
WAITPAGE N/A
WAITWR 2
WAITWEN 0
WAITTURN N/A
A
D(A)
clk_out
addr
data
cs{n}
st_we_n
A
D(A)
clk_out
addr
data
cs[n]
st_we_n