Aes dma buffer descriptor, Block diagram data blocks – Digi NS9215 User Manual
Page 356

A E S D A T A E N C R Y P T I O N / D E C R Y P T I O N M O D U L E
AES DMA buffer descriptor
356
Hardware Reference NS9215
Block diagram
Data blocks
The AES module works on 128-bit blocks of data. This table shows the performance
per each 128-bit block, depending on the key size:
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
A E S D M A b u f f e r d e s c r i p t o r
The AES DMA buffer descriptor is the same as the external DMA buffer descriptor,
with the exception of the control bits — AES op and AES control.
Ch 1 Ext DMA
Source
Key
Expander
FIFO
AES
Engine
FIFO
Expanded Key
Data In
Data Out
IV
Mode and Control
Ch 1 Ext DMA
Destination
From System Memory
To System Memory
Key size
Characteristic
128
192
256
Number of cycles
44
52
60
Latency (cycles)
44
52
60
Throughput (bits/cycles)
~2.90
~2.46
~2.13
Throughput @ 75 MHz (bytes/sec)
~27.19
~23.06
~19.97