Digi NS9215 - Manual (Page 142)

S Y S T E M C O N T R O L M O D U L E
Programmable timers
142 Hardware Reference NS9215
This table shows the hmaster[3:0] assignments for the processor.
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P r o g r a m m a b l e t i m e r s
The processor provides 11 programmable timers:
Software watchdog timer
10 general purpose timers
Software
watchdog timer
The software watchdog timer, set to specific time intervals, handles gross system
misbehaviors. The watchdog timer can be set to timeout in longer ranges of time
intervals, typically in seconds.
The software watchdog timer can be enabled or disabled, depending on the
operating condition. When enabled, system software must write to the Software
Watchdog Timer register before it expires. When the timer does timeout, the
system is preconfigured to generate an IRQ, an FIQ, or a RESET to restart the entire
system.
0x7000 0000 – 0x7FFF FFFF 256 MB System memory chip select 3
Static memory (default)
0x8000 0000 – 0x8FFF FFFF 256 MB Reserved
0x9000 0000 – 0x9FFF FFFF 256 MB IO hub
0xA000 0000 – 0xA05F FFFF 6 MB Reserved
0xA060 0000 – 0xA06F FFFF 1 MB Ethernet Communication Module
0xA070 0000 – 0xA07F FFFF 1 MB Memory controller
0xA080 0000 – 0xA08F FFFF 1 MB External DMA module
0xA090 0000 – 0xA09F FFFF 1 MB System Control Module
0xA0A0 0000 – 0xFFFF FFFF 1526MB Reserved
Master Name hmaster[3:0] assignment
ARM926 data 0000
Ethernet Rx 0001
Ethernet Tx 0010
IO hub 0100
ARM926 instruction 0101
Address range Size System functions