Digi NS9215 - Manual (Page 14)

14 Hardware Reference NS9215
Static Memory Write Delay 0–3 registers..................................................257
StaticMemory Turn Round Delay 0–3 registers ...........................................258
C h a p t e r 6 : E t h e r n e t C o m m u n i c a t i o n M o d u l e . . . . . . . . . . . . . . . . . . . . . . 2 6 1
Features.................................................................................261
Common acronyms ....................................................................261
Ethernet communications module ..................................................262
Ethernet MAC..................................................................................262
MAC module block diagram ..........................................................263
MAC module features .................................................................263
PHY interface mappings ..............................................................264
Station address logic (SAL) ..................................................................264
MAC receiver ...........................................................................265
Statistics module .............................................................................265
Ethernet front-end module .................................................................266
Ethernet front-end module (EFE) ...................................................266
Receive packet processor ............................................................266
Transmit packet processor ...........................................................267
Receive packet processor ...................................................................267
Power down mode .....................................................................267
Transferring a frame to system memory ...........................................268
Receive buffer descriptor format ...................................................268
Receive buffer descriptor format description.....................................268
Receive buffer descriptor field definitions ........................................269
Transmit packet processor ..................................................................269
Transmit buffer descriptor format ..................................................270
Transmit buffer descriptor field definitions.......................................270
Transmitting a frame..................................................................271
Frame transmitted successfully .....................................................272
Frame transmitted unsuccessfully ..................................................272
Transmitting a frame to the Ethernet MAC ........................................272
Ethernet underrun .....................................................................272
Ethernet slave interface.....................................................................273
Interrupts ......................................................................................273
Interrupt sources ......................................................................273
Status bits...............................................................................274
Resets ..........................................................................................274
Multicast address filtering ..................................................................275
Filter entries ...........................................................................275
Multicast address filter registers ....................................................275
Multicast address filtering example 1 ..............................................275
Multicast address filtering example 2 ..............................................276
Notes ....................................................................................276
Clock synchronization........................................................................276