Digi NS9215 User Manual
Page 183
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S Y S T E M C O N T R O L M O D U L E
Module Reset register
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183
The Module Reset register resets each module on the AHB bus.
Register
Register bit
assignment
13
12
11
10
9
8
7
6
5
4
3
2
1
0
15
14
31
29
28
27
26
25
24
23
22
21
20
19
18
17
16
30
ADC
RST STAT
Reserved
Reser
ved
Reser
ved
EXT
DMA
IO
hub
I
2
C
Reser
ved
AES
Reserved
SPI
UART
D
UART
C
UART
A
Eth
MAC
UART
B
Bits
Access
Mnemonic
Reset
Description
D31:29
R
RST STAT
Not reset
Reset status
001
External reset using reset_n
010
External reset using sreset_n
011
PLL change reset)
100
Software watchdog reset
101
AHB bus monitor reset
Status to determine the cause of the last chip level
reset.
D28:15
N/A
Reserved
N/A
N/A
D14
R/W
EXT DMA
0x1
External DMA
0
Module reset
1
Module enabled
D13
R/W
IO hub
0x1
IO hub
0
Module reset
1
Module enabled
D12
N/A
Reserved
N/A
N/A
D11
R/W
I
2
C
0x1
I
2
C
0
Module reset
1
Module enabled
D10
N/A
Reserved
N/A
N/A
D09
R/W
AES
0x0
AES
0
Module reset
1
Module enabled
D08
R/W
ADC
0x1
ADC
0
Module reset
1
Module enabled