Motorola DSP96002 - Manual (Page 895)

Index (Continued)
INDEX - 8 MOTOROLA
Timer Control Register (TCR) 1-17 , 7-6 , 47
Timer Count Register (TCR) . . . . . . . . 7-3
Timer Count Register (TCTR) 1-17 , 7-3 , 48
Timer Enable (TE) Bit 15 . . . . . . . . . . 7-8
Timer Functional Description . . . . . . . 7-8
Timer Preload Register . . . . . . . . . . . . 7-3
Timer Preload Register (TPR) . 1-17 , 7-4 ,
48
Timer Resolution . . . . . . . . . . . . . . . . . 7-8
TOUT Enable (TO2-TO0) Bit 11-13 7-7 , 7-
8
Transfer with Parallel Move Instruction .37
Transmit and Receive Frame Sync Direc-
tions -FSD0,FSD1 (Bit 2,4) 8-16 , 8-
17
Transmit Byte Registers . . . . . . . . 5-5 , 57
Transmit Data Register (CTX) . . . . . . .50
Transmit Slot Mask Registers . . . . . . 8-22
Transmit Slot Mask Shift Register . . . 8-23
Two’s-complement . . . . . . . . . . . . . . . 1-8
—V—
VCO . . . . . . . . . . . . . . . . . . . . . . .9-3 , 9-4
Voltage Controlled Oscillator (VCO) . . 9-4
—W—
Wait State . . . . . . . . . . . . . . . . . . . . . . 4-4
Word Length Divider . . . . . . . . . . . . . 8-15
—X—
XDB . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-7
—Y—
YD3-YD0 . . . . . . . . . . . . . . . . . . . . . . . 9-4