Fmpy//fadd.s floating-point fmpy//fadd.s, Multiply and add – Motorola DSP96002 User Manual
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DSP96002 USER’S MANUAL
MOTOROLA
Operation:
S1 * S2
→
ROUND(MP)
→
D1
(parallel data bus move)
S3 + D2
→
ROUND(SP)
→
D2
FMPY//FADD.S
Floating-Point
FMPY//FADD.S
Multiply and Add
Description:
Multiply the two operands S1 and S2, round to the precision indicated by the MP mode bit and store the
result in the specified destination register D1. Simultaneously, add the two operands S3 and D2, round to
single precision and store the result in the destination operand D2. Typically, if the result of the multiplica-
tion will be used immediately following a data ALU instruction such as FADD (i.e., equivalent to an FMAC),
the maximum precision (MP=1) will be programmed. However, if the product is to be stored, then single
precision (MP=0) rounding will be used.
Input Operand(s) Precision: SEP Floating-Point.
Addition Output Operand Precision: SP Floating-Point.
Multiplication Output Operand Precision: as indicated by MP.
CCR Condition Codes:
C
- Not affected.
V
- Not affected.
Z
- Set if result of the addition is zero. Cleared otherwise.
N
- Set if result of the addition is negative. Cleared otherwise.
I
- Set if result of the addition is infinity. Cleared otherwise.
LR
- Not affected.
–
R
- Not affected.
A
- Not affected.
ER Status Bits:
INX
- Set if the result of the addition or the multiplication is inexact. Cleared otherwise.
DZ
- Always cleared.
UNF
- Set if the result of the addition or the multiplication underflows. Cleared otherwise.
OVF
- Set if the result of the addition or the multiplication overflows. Cleared otherwise.
OPERR- Set if one of the multiply operands is infinity and the other is zero. Set if the addition
operands are opposite-signed infinities. Cleared otherwise.
Assembler Syntax:
FMPY S1,S2,D1 FADD.S S3,D2
(move syntax - see the MOVE instruction de-
scription.)
FMPY S2,S1,D1 FADD.S S3,D2
(move syntax - see the MOVE instruction de-
scription.)