Motorola DSP96002 - Manual (Page 749)

C-26 DSP96002 USER’S MANUAL MOTOROLA
E1 E2
ED
D
11 Bits
11 Bits
11 Bits
Add exponents
and subtract bias
S1 S2
put operand. These cycles are used to normalize the input operand. The original value of the operand in the
source register is not affected. During the IEEE mode procedure all activity of the chip is suspended
until the input operands have been normalized. When denormalized output results are detected, each
denormalized output result is normalized (one additional instruction cycle). There is no extra cycle penalty
for entering the IEEE mode procedure when normalizing output results.
C.2 FIXED-POINT NUMBER STORAGE AND ARITHMETIC
C.2.1 General
Integer operand sizes are defined as follows:
1. Byte: 8 bits long
2. Short word: 16 bits long
3. Word: 32 bits long
4. Long word: 64 bits long
The operand size for each instruction is either explicitly encoded in the instruction or implicitly defined by
the instruction.
C.2.2 Integer Storage Format in Memory
The DSP96002 supports four integer memory data formats:
1. Signed word integer: 32 bits wide, two’s complement representation. This storage format can
be used in either X and/or Y data memory space.
2. Signed Long Word Integer: 64 bits wide, two’s complement representation. This storage format