Motorola DSP96002 - Manual (Page 332)

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FMPY//FADDSUB.X FMPY//FADDSUB.X
Floating-Point Multiply, Add, and Subtract
Operation:
S1 * S2
→
ROUND(SEP)
→
D1
(parallel data bus move)
D3 + D2
→
ROUND(SEP)
→
D2
D3 - D2
→
ROUND(SEP)
→
D3
Assembler Syntax:
FMPY S1,S2,D1 FADDSUB.X D3,D2
(move syntax - see the MOVE instruction de-
scription.)
FMPY S2,S1,D1 FADDSUB.X D3,D2
(move syntax - see the MOVE instruction de-
scription.)
Description:
Multiply the two operands S1 and S2, round to single extended precision and store the result in the spec-
ified destination register D1. Simultaneously, add the two operands D2 and D3, subtract D2 from D3,
round both results to single extended precision and store the result of the addition in register D2 and of the
subtraction in register D3. Typically, if the result of the multiplication will be used immediately following
FADD (i.e., equivalent to an FMAC), the maximum precision (MP=1) will be programmed. For the special
case of |s|=|D|, the result can be +0 or -0; the sign of the resulting zero will be the sign of the input operand
in D.
Input Operand(s) Precision: SEP Floating-Point.
Addition Output Operand Precision: SEP Floating-Point.
Subtraction Output Operand Precision: SEP Floating-Point.
Multiplication Output Operand Precision: SEP Floating-Point.
CCR Condition Codes:
C - Not affected.
V - Not affected.
Z - Set if result of the addition is zero. Cleared otherwise.
N - Set if result of the addition is negative. Cleared otherwise.
I - Set if result of the addition is infinity. Cleared otherwise.
LR - Not affected.
–
R - Not affected.
A - Not affected.