Motorola DSP96002 User Manual
Page 83
MOTOROLA
DSP96002 USER’S MANUAL
6 - 7
In an instruction word, one or more "effective addresses" may be specified. An effective address defines
the way in which an operand location is derived. The effective address will include an addressing mode
and may also include a selected register. The addressing mode selects the address update to be used
(see Section 5.7). The register specified may be the location of an operand or it may be an address register
used to calculate the address of an operand. Certain instructions imply the use of specific registers and do
not specify effective addresses for these registers.
The DSP96002 instructions consist of one or two 32-bit words - an operation word and an optional effective
address extension word. The instruction and its length are specified by the first word of the instruction. The
general format of the operation word is shown in Figure 6-8.
Most instructions specify data movement on the X and Y data buses and Data ALU operations in the same
operation word. The DSP96002 is designed to perform each of these operations in parallel. The data bus
movement field provides the operand reference type, the direction of transfer and the effective address(es)
for data movement on the X and Y data buses. The operand reference type selects the type of memory or
register reference to be made. The data bus movement field may require additional information to fully
specify the operand for certain addressing modes. An effective address extension word following the oper-
ation word is used to provide immediate data, an absolute address or a displacement if required.
The opcode field of the operation word specifies the Data ALU operation or the Program Controller opera-
tion to be performed and any additional operands required by the instruction. Only those Data ALU and
Program Controller operations which can accompany data bus movement activity will be specified in the
opcode field of the instruction. Other Data ALU and Program Controller operations and all Address Gen-
eration Unit operations will be specified in an instruction word with a different format. These include oper-
ation words which contain short immediate data or short absolute addresses.
The assembly language source code for a typical one word instruction is shown below. The source code
is organized into up to six fields.
(Multiplier)
(Adder/Subtracter)
Opcode Operands
Opcode Operands
X Bus Data
Y Bus Data
FMPY D0,D5,D2
FSUB.S D7,D3
X:(R0)+,D0.S
Y:(R4)+,D5.S
The first Opcode field indicates the Data ALU, Address Generation Unit, Bit Manipulation Unit, or Program
Controller operation to be performed. The first Operands field specifies the operands to be used by the
opcode specified in the first Opcode field.
The second Opcode field indicates a floating-point adder/subtracter operation in the Data ALU whenever
parallel operation of the floating point adder/subtracter and multiplier is required. The second Operands
OPCODE
31
14 13
0
OPTIONAL EFFECTIVE ADDRESS EXTENSION
DATA BUS MOVE FIELD
Figure 6-8. Instruction Word - General Format